This invention relates to active matrix display driving circuits--in particular to a novel sample and hold (S/H) circuit incorporated into a column driver circuit which can be used for sampling and holding signals at least once in a horizontal line time for an active matrix display device.
Active matrix display devices commonly utilize a plurality of display elements which are arranged in a matrix of columns and rows on a transparent substrate. The most commonly used display device is the liquid crystal display (LCD) or similar devices realized on a transparent substrate, normally a glass.
A display system that incorporates an active matrix liquid crystal device (AMLCD)) also includes column (data) drivers, controllers and row drivers. A conventional AMLCD requires one external lead for each column or row line. For example, a video display with a resolution of 480.times.240 would require 115,200 external connecting leads. The need for this large number of leads in the display is a serious problem, which gets worse as the resolution and complexity of displays increase.
One solution to the problem is to design a self-scanned AMLCD with different driving schemes which can reduce not only the number of column input leads but also the external column driver integrated circuit (IC) chips (or complexity of column driver circuit) as compared to the conventional unscanned AMLCD. In such a driving scheme, the input column data signals, such as video signals, are grouped into N groups, each with M columns, and arranged in a multiplexed fashion to feed the display sequentially through column line input leads using a designated portion of a line time, approximately 1/N of a line sampling time, Ts, for each group. For those with ordinary skill in the art, one horizontal line time Trow is about 63.5 .mu.S for NTSC video signals with effective line sampling time, Ts, is about 50 .mu.S.
For a display with a resolution of 480.times.240, for example, M and N can be equal to 120 and 4, respectively, or other combinations such that M.times.N=480. In this way, the number of input data column leads is only 1/Nth of the total number of display column lines and only one external column driver chip is used if the driver chip has M outputs. Although it is common to use the least number of external column driver chips which is usually one, the number of external column driver chips can be more than one, depending on the number of outputs for each column driver chip. For example, if the number of outputs for each column driver chip is M/2, the requirement is two chips.
In a conventional unscanned AMLCD display system, there should be N column driver chips used if each column driver chip has M outputs. Two S/H circuits are needed for each of M output stages in the column driver chip. During any given line sampling time period, Ts, one of two S/H circuits samples the input video signal for the next horizontal line, while the other S/H circuit holds the data for outputting to the current scanning horizontal line. Therefore, there are only one sampling and one holding operations during a horizontal line time if the S/H circuit driving scheme in accordance with prior art.
As stated previously, the number of external column driver chips can be reduced to one in an AMLCD with the column input multiplexing driving scheme. However, in this single column driver chip display system, the approach of using two S/H circuits, with the driving scheme in accordance with the prior art for each output stage of a column driver chip, would not work if N is greater than one, because one of the two S/H circuits samples the input video signal of the next horizontal line only once and the other S/H circuit holds the signal for outputting to the current horizontal line only once during one horizontal scanning line. Thus, there is no time for N time divisions during one line time. Therefore, a column driver circuit with conventional S/H circuit driving scheme would not be able to be incorporated into a display system with column input multiplexing driving scheme.